Recommended Design Option To Support Pc2700 Ddr Sdram With Existing Pc1600 And Pc2100 Intel 855Pm Platforms; Shortened Data Signal Group Trace Length; Supporting Pc2700 Based On An Existing Pc Platform Layout; Figure 91. Data Signal Group (Sdq[71:0], Sdqs[8:0]) Routing Topology - Pc2700, Pc2100 And Pc1600 Compliant - Intel 855PM Design Manual

System Memory Design Guidelines (DDR-SDRAM)
6.1.7. Recommended Design Option to Support PC2700 DDR SDRAM
with Existing PC1600 and PC2100 Intel 855PM Platforms
The following sections document the currently available design option for enabling PC2700 DDR
SDRAM support based on existing platform layouts.
6.1.7.1.

Shortened Data Signal Group Trace Length

Modifications to current platforms to support PC2700 are possible by reducing the overall motherboard
trace length for the data signal group if current trace lengths exceed the PC2700 trace length guidelines.
This includes all DDR data signals, SDQ[71:0], and data strobe signals, SDQS[8:0].
Design guidelines for supporting PC2700 based on an existing PC1600 and PC2100 layout are
presented in Section 6.2.7.1.1. A list of general design considerations for adapting current platforms to
support PC2700 is summarized in Section 6.2.7.1.2.
6.1.7.1.1.

Supporting PC2700 Based on an Existing PC Platform Layout

While the maximum length of L1, L2, L3, and L4 remains unchanged from previous revisions of this
design guide, the maximum overall length allowed from the MCH-M to the second SO-DIMM (L1 + Rs
+ L2 + L3) for PC2700 support is limited to 4.5 inches. This represents a reduction of 1.0 inches
compared to that allowed for PC2100 and PC1600 design guidelines. As a result, platforms based on
current PC2100 and PC1600 layout guidelines may require a reduction in trace lengths of up to 1.0
inches, in order to meet the PC2700 maximum data signal group length requirements.
Figure 91. Data Signal Group (SDQ[71:0], SDQS[8:0]) Routing Topology – PC2700, PC2100 and
PC1600 Compliant
MCH
Die
Table 33. Data Signal Group (SDQ[71:0], SDQS[8:0]) Routing Guidelines – PC2700, PC2100 and
PC1600 Compliant
DDR Data Signal Group (for
platform supporting PC2700,
PC2100, PC1600 DDR
SDRAM)
DDR Data Signal Group
(for platform supporting
PC2100 and PC1600
SDRAM)
158
MCH Pkg Route
P
L 1
L1
Min = 0.5"
Max = 3.75"
Min = 0.5"
DDR
Max = 3.75"
R s
L2 L3
SO-DIMM0 PAD
L2 L3 L4
Min = 0"
Min = 0" Min = 0"
Max =
Max = 0.75" Max = 1.0"
0.8"
Min = 0"
Min = 0" Min = 0"
Max =
Max = 0.75" Max = 1.0"
0.8"
®
Intel 855PM Chipset Platform Design Guide
R
V tt
R t
L4
SO-DIMM1 PAD
L1 + Rs +
Rs Rt
L2 + L3
Min = 0.5"
22.6 54.9 ±
± 1% 1%
Max = 4.5"
Min = 0.5"
22.6 54.9 ±
± 1% 1%
Max =5.5"