Emi Considerations; Common Mode Chokes; Figure 107. Good Downstream Power Connection; Figure 108. Common Mode Choke Schematic - Intel 855PM Design Manual

I/O Subsystem

Figure 107. Good Downstream Power Connection

9.4.4.

EMI Considerations

The following guidelines apply to the selection and placement of common-mode chokes and ESD
protection devices.
9.4.4.1.

Common Mode Chokes

Testing has shown that common-mode chokes can provide required noise attenuation. A design should
include a common-mode choke footprint to provide a stuffing option in the event the choke is needed to
pass EMI testing. Figure 108 shows the schematic of a typical common-mode choke and ESD
suppression components. The choke should be placed as close as possible to the USB connector signal
pins.

Figure 108. Common Mode Choke Schematic

Common mode chokes distort full-speed and high-speed signal quality. As the common mode
impedance increases, the distortion will increase, so you should test the effects of the common mode
choke on full speed and high-speed signal quality. Common mode chokes with a target impedance of 80
to 90 at 100 MHz generally provide adequate noise attenuation.
198
Thermister
5V
5V
5V Sus Switch
220uF
Common Mode
Choke
D+
D -
ESD Supression
Components
V V c c c c
1 1
470pF
Port1
4 4
G G n n d d
V V c c c c
1 1
470pF
Port2
4 4
G G n n d d
Vcc
USB A
Connector
®
Intel 855PM Chipset Platform Design Guide
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