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11.4.1.
Intel 82801DBM ICH4-M Power Sequencing Requirements
11.4.1.1.
3.3/1.5 V and 3.3/1.8 V Power Sequencing
No power sequencing requirements exist for the associated 3.3 V/1.5 V rails or the 3.3 V/1.8 V rail of
the ICH4-M. It is generally good design practice to power up the core before or at the same time as the
other rails.
11.4.1.2.
V
/ 3.3 V Sequencing
5REF
V
is the reference voltage for 5 V tolerance on inputs to the Intel 82801DBM ICH4-M. V
5REF
be powered up before V
or before V
must be followed in order to ensure the proper functionality of the ICH4-M. If the rule is violated,
internal diodes will attempt to draw power sufficient to damage the diodes from the V
141 shows a sample implementation of how to satisfy the V
This rule also applies to the stand-by rails, but in most platforms, the V
V
and therefore, the V
CCSUS5
V
_
will always be powered up before V
5REF
SUS
from the V
Figure 141. Example V
11.4.1.3.
V
5REF_SUS
The aforementioned rule for V
the V
CCSUS3
the V
CCSUS5
the V
CCSUS3
in the platform design.
In order to meet reliability and testing requirements for the USB interface, the following design
recommendations for the V
specification regarding continuous short conditions must be addressed. The USB 1.1 specification
®
Intel
855PM Chipset Platform Design Guide
_
, or after V
CC3
3
_
within 0.7 V. It must also power down after or simultaneous to V
CC3
3
_
rail will always come up after the V
CCSUS3
3
rail, this rule must be comprehended in the platform design.
CCSUS5
/ 3.3 V Sequencing Circuitry
5REF
Design Guidelines
also applies to the V
5REF
_
rail is derived from the V
3
rail. As a result, V
_
5REF
SUS
_
rail is not derived from the V
3
pins of the ICH4-M should be followed. Changes to the USB
5REF_SUS
Platform Power Delivery Guidelines
_
within 0.7 V. Also, V
CC3
3
/ 3.3 V sequencing rule.
5REF
_
. In platforms that do not derive the V
CCSUS3
3
_
input pin. However, in some platforms,
5REF
SUS
and therefore, the V
CCSUS5
CCSUS3
will always be powered up before V
rail, the V
sequencing rule must be comprehended
CCSUS5
5REF
5REF
must power down after V
5REF
_
. These rules
CC3
3
_
rail. Figure
CC3
3
_
rail is derived from the
CCSUS3
3
rail. As a result,
CCSUS5
CCSUS3
_
rail will always come up after
3
_
. In platforms where
CCSUS3
3
must
_
,
CC3
3
_
rail
3
251
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