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R
A load change transient occurs when coming out of or entering a low power state. These are not only
quick changes in current demand, but also long lasting average current requirements. This occurs when
the processor enters different power modes by stopping and starting it's internal clock. The processor
current requirements can change by as much as 60% of the maximum current very quickly.
The estimated Intel® Pentium® M Processor / Intel® Celeron® M Processor worst-case current
consumption change waveform is illustrated in Figure 57. This figure illustrates the expected waveform
seen at the die bumps of the CPU. Due to the presence of decoupling capacitors, it is expected that the
ramp rates of the current would slow down as seen by the motherboard's high frequency and bulk
decoupling capacitors.
In Figure 57, worst-case leakage current is estimated to be 6.4 A. When the clock starts to toggle,
current consumption in one clock may change instantaneously, up to 60% of the estimated dynamic
current consumption of 18.6 A; thus, reaching a current of 17.56 A. After that initial step, the current
may ramp continually within 9 clocks; thus, reaching an estimated I
that current consumption of Intel Pentium M processor and Intel Celeron products may be lower than
what is shown in Figure 57. However, to guarantee the suitability of the motherboard and VRM design
for future, higher frequency products the V
requirements of Figure 57.
Figure 57. Estimated Processor Current Consumption Change During STPCLK Exit
I
CCMAX
I
LKGMAX
5.9.2.
High Frequency, Mid Frequency, and Bulk Decoupling
System motherboards should include high and mid frequency and bulk decoupling capacitors as close to
the socket power and ground pins as possible. Decoupling should be arranged such that the lowest ESL
devices (0612 reverse geometry type, if used for some of the recommended options below) are closest to
the processor power pins followed by the 1206 devices (if used), and finally, bulk electrolytics (organic
covered tantalum or aluminum covered capacitors). System motherboards should include bulk-
decoupling capacitors as close to the processor socket power and ground pins as possible. The layout
example shown in Section 5.9.3 should be followed closely. Table 20 lists the recommended decoupling
®
Intel
855PM Chipset Platform Design Guide
Icc[A]
9CLKs
= 25A
17.56A
= 6.4A
1CLK
CCMAX
design should be able to meet the current
CC-CORE
0.6*I
=11.16A
DYNMAX
Platform Power Requirements
of 25 A. It should be noted
I
=18.6A
DYNMAX
t
105
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