Figure 11. Intel 855Pm Mch Source Synchronous Signals Recommended Escape Routing Example - Intel 855PM Design Manual

R
Figure 11. Intel 855PM MCH Source Synchronous Signals Recommended Escape Routing
Example
®
Intel 855PM Chipset Platform Design Guide
PRIMARY SIDE PRIMARY SIDE
PRIMARY SIDE PRIMARY SIDE
LAYER 3 LAYER 3
VCCGA VCCGA VCCHA VCCHA
1.8v Decap 1.8v Decap
VCCA=1.8v VCCA=1.8v
A[16:3]#, REQ*# A[16:3]#, REQ*#
HI 1.8v HI 1.8v
Branch Branch
D[63:48]# D[63:48]#
D[31:16]# D[31:16]#
LAYER 6 LAYER 6
1.2v 1.2v
1.2v 1.2v
855PM 855PM
855PM 855PM
MCH MCH
Core Core
Core Core
FSB Design Guidelines
D[47:32]# D[47:32]#
D[15:0]# D[15:0]#
100MHz 100MHz
CLKs CLKs
A[31:17]# A[31:17]#
47