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Platform Design Checklist
14.4.2.
In Target Probe (ITP)
14.4.2.1.
ITP700FLEX Connector
Pin Name
System
Pull up/Pull down
BPM[5:0]#
DBA#
Pull up to target
VCC
DBR#
Pull up to target
VCC or See Notes
RESET#
TCK
Pull down to GND
284
1, 2
ITP700FLEX Debug Port Connector – Resistor Recommendations
150
- 240
150
- 240
27.4
± 1%
(IF ITP700FLEX
IS USED)
27
(IF ITP700FLEX
IS NOT USED)
Series Termination
Resistor (
ITP700FLEX supported Validation
Systems:
Point-to-point connection to CPU via a
Zo = 55 trace.
ITP700FLEX
BPM[3:0]#
BPM[4]#
BPM[5]#
ITP700FLEX supported Production
Systems:
Leave the signals as NC (No Connect).
DBA# is an optional signal that may be
implemented when the ITP700FLEX is
used.
ITP700FLEX supported Validation
Systems:
Pull up resistor should be placed within
1 ns of the ITP700FLEX.
ITP700FLEX supported Production
Systems:
Leave this signal as NC (No Connect).
See Section 4.3.1.1 and 4.3.1.4 for
details.
ITP700FLEX supported Validation
Systems:
The signal needs to be routed to system
reset logic (e.g. connect to
SYS_RESET# of ICH4-M with pull up to
VccSUS3_3). Pull up resistor must be
placed within 1 ns of the ITP700FLEX.
ITP700FLEX supported Production
Systems:
Pull up may be required depending on
impact to system reset logic that it is
connected to.
See Section 4.3.1.1 and 4.3.1.4 for
details.
See RESET# in Section 14.4.1
ITP700FLEX supported Validation
Systems:
Parallel termination resistor placed
within ±200 ps of ITP700FLEX.
ITP700FLEX supported Production
Systems:
®
Intel
855PM Chipset Platform Design Guide
R
Notes
to
CPU
BPM[3:0]#
PRDY#
PREQ#
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