Figure 101. Intel 82801Dbm Ich4-M Ac'97 - Ac_Bit_Clk Topology; Figure 102. Intel 82801Dbm Ich4-M Ac'97 - Ac_Sdout/Ac_Sync Topology; Table 48. Ac'97 Ac_Bit_Clk Routing Summary - Intel 855PM Design Manual

Chipset platform for use with pentium m and celeron m processors
Table of Contents

Advertisement

I/O Subsystem
AC_SDIN1, and AC_SDIN2 may not be driven. If the link is enabled, the assumption can be made that
there is at least one codec.
Figure 101. Intel 82801DBM ICH4-M AC'97 – AC_BIT_CLK Topology

Table 48. AC'97 AC_BIT_CLK Routing Summary

AC'97 Routing Requirements
5 on 5
NOTES:
Simulations were performed using Analog Device's* Codec (AD1885) and the Cirrus Logic's* Codec (CS4205b).
1.
Results showed that if the AD1885 codec was used a 33- resistor was best for R1 and if the CS4205b codec
was used a 47- resistor for R1 was best.
Bench data shows that a 47- resistor for R1 is best for the Sigmatel* 9750 codec.
2.
Figure 102. Intel 82801DBM ICH4-M AC'97 – AC_SDOUT/AC_SYNC Topology
190
Intel
ICH4-M
R1
L1
AC_BIT_CLK
Maximum Trace Length
(inches)
L1 = (1 to 8) – L3
L2 = 0.1 to 6
L3 = 0.1 to 0.4
L4 = (1 to 6) – L3
Intel
ICH4-M
L2
AC_SDOUT
C
R2
L3
L3
L4
O
N
N
L2
Primary
Codec
Series Termination
Resistance
R1 = 33
- 47
R2 = Option 0
resistor
for debugging purposes
C
R2
O
L3
L1
N
N
L3
R1
L4
Primary
Codec
®
Intel
855PM Chipset Platform Design Guide
R
AC_BIT_CLK Signal
Length Matching
N/A

Advertisement

Table of Contents
loading

Table of Contents