Clk66 Clock Group; Figure 131. Clk66 Group Topology; Table 64. Clk66 Group Routing Guidelines - Intel 855PM Design Manual

Platform Clock Routing Guidelines
10.2.2.

CLK66 Clock Group

The driver is the clock synthesizer 66-MHz clock output buffer and the receiver is the 66-MHz clock
input buffer at the Intel 855PM MCH and the Intel 82801DBM ICH4-M. Note that the goal is to have as
little skew between the clocks within this group as possible.

Figure 131. CLK66 Group Topology

Clock
Driver

Table 64. CLK66 Group Routing Guidelines

Signal Group
Motherboard Topology
Reference Plane
Characteristic Trace Impedance (Zo)
Trace Width
Trace to Space Ratio
Group Spacing
Trace Length – A
Trace Length – B
Series Termination Resistor (R1)
Skew Requirements
Clock Driver MCH
Clock Driver to ICH4-M
NOTES:
Recommended resistor values and trace lengths may change in a later revision of the design guide.
1.
If the trace length from clock driver to MCH is X, then the trace length from clock driver to ICH4-M must be length
2.
matched within 100 mils.
236
A
Parameter
R1
B
Routing Guidelines
CLK66
Point-to-Point
Ground Referenced (Contiguous over entire
length)
55 ± 15%
4 mils
1:5 (e.g. 4 mils trace 20 mils space)
Isolation spacing from non-Clock signals =
20 mils minimum
Min = 0 inches
Max = 0.50 inches
Min = 4.0 inches
Max = 8.50 inches
33 ± 5%
Minimal skew (~ 0) between clocks within the
CLK66 group
X
X ± 100 mils
®
Intel 855PM Chipset Platform Design Guide
R
MCH and
ICH4-M
Figure Notes
1
Figure 131
Figure 131
Figure 131
2
2