Figure 140. Intel 855Pm/82801Dbm Platform Power-Up Sequence - Intel 855PM Design Manual

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Figure 140. Intel 855PM/82801DBM Platform Power-Up Sequence
Hub interface "CPU
Reset Complete"
STPCLK#,
CPUSLP#
Frequency
PCIRST#
SUS_STAT#
PWROK, VGATE
SLP_S3#
SLP_S4#
SLP_S5#
RSMRST#,
RSM_PWROK
®
Intel 855PM Chipset Platform Design Guide
System
G3 G3
State
message
Straps
T181
Vcc
T181
SUSCLK
T173
VccSus
Platform Power Delivery Guidelines
S5 S4 S3
T184
T185
T177
T176
T183b
T18 3a
T183
T182
S0 S0 state
T186
Strap Values
Normal Operation
T178
Running
249