Figure 62. Vcc-Core Power Delivery And Decoupling Example (Layers 3, 5, And 6); Figure 63. Recommended Sp Cap Via Connection Layout (Secondary Side Layer) - Intel 855PM Design Manual

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Figure 62. V Power Delivery and Decoupling Example (Layers 3, 5, and 6)
CC-CORE
LAYER 3 LAYER 3
DATA DATA
ADDRESS ADDRESS
L1 PS L1 PS
L2 GND L2 GND
L3 Sig L3 Sig
L4 GND L4 GND
L5 PWR L5 PWR
L6 Sig L6 Sig
L7 GND L7 GND
L8 SS L8 SS

Figure 63. Recommended SP Cap Via Connection Layout (Secondary Side Layer)

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Intel 855PM Chipset Platform Design Guide
LAYER 5 LAYER 5
VCC-CORE VCC-CORE
- -
+ +
+ +
VCC-CORE VCC-CORE
VR Feed VR Feed
VCC-CORE VCC-CORE
GND Ref for GND Ref for
Layer 6 Layer 6
GND GND
50 mils 50 mils
220 mils 220 mils
Platform Power Requirements
LAYER 6 LAYER 6
VCC-CORE VCC-CORE
DATA DATA
ADDRESS ADDRESS
Cross Cross
Sectional Sectional
View View
+ + + +
- -
82 mils 82 mils
50 mils 50 mils
82 mils 82 mils
113