Intel 855PM Design Manual page 358

Chipset platform for use with pentium m and celeron m processors
Table of Contents

Advertisement

A
5,9,16,17,18,19,20,24,25,26,33,34,36,41
VR_SHUTDOWN_R
J16
Measurement Point
+V3.3ALWAYS 5,9,16,17,18,19,20,24,25,26,33,34,36,41
KSC Testpoint Header
Y2
4
R19
NO_STUFF_10K
C79
10MHZ
18pF
P91/IRQ1#
+V3.3ALWAYS_KBC 30
U6
1
30
SMC_RST#
RST_HDR#
4
SMC_PROG_RST#
2
74AHC1G08
+V3.3ALWAYS 5,9,16,17,18,19,20,24,25,26,33,34,36,41
3
NO_STUFF_10K
36
VR_SHUT_DOWN#
R18
0
16,18,22,34,36
PM_PWROK
P91/IRQ1#
+V3.3ALWAYS 5,9,16,17,18,19,20,24,25,26,33,34,36,41
LIDON
SW2
2
7
1
RP1B 10K
2
3
SPDT_SLIDE
LID
SWITCH
+V3.3ALWAYS 5,9,16,17,18,19,20,24,25,26,33,34,36,41
VBATTON
SW1
1
R5 10K
2
3
SPDT_SLIDE
2
+V3.3ALWAYS_KBC 30
VIRTUAL
BATTERY
RP1D
10K
J1
+V3.3ALWAYS 5,9,16,17,18,19,20,24,25,26,33,34,36,41
+V3.3ALWAYS_KBC 30
RP9A
RP9B
Program
10K
10K
1
J25
1
2
BT_DETACH
3
4
5
6
7
8
SMC_PROG_RST#
9
10
SMC_MD
11
12
13
14
CON14_RECEPT
A
B
+V3.3ALWAYS
30
+V3.3ALWAYS_KBC
R10
C19
0.01_1%
22UF
+V3.3ALWAYS_KBC 30
C77
18pF
+V3.3ALWAYS_KBC 30
RP7C
RP7D
10K
10K
U13
59
VCC
9
VCL
4
VCCB
36
AVREF
J12
37
AVCC
1
SMC_MD
2
5
MD1
SMC_MD
3
6
MD0
CON3_HDR
SMC_XTAL
2
XTAL
SMC_EXTAL
3
EXTAL
SMC_RES#
1
RES#
SMC_STBY#
8
STBY#
7
24,30
SMC_INITCLK
NMI
R72
0
R45
VR_SHUTDOWN_R
13
P51/RxD0
TP_NMI_GATE#
14
P50/TxD0
12
33,34,41
SMB_SB_CLK
P52/SCK0/SCL0
16
33,34,41
SMB_SB_DATA
P97/SDA0
17
14,16,22,34,40,41
PM_SLP_S3#
P96/0/EXCL
23
33,34,41
SMB_SB_ALRT#
P92/IRQ0#
24
P91/IRQ1#
25
34,41
SMC_ONOFF#
P90/IRQ2#/ADTRG#
SMC_LID
38
P70/AN0
VIRTUAL_BATTERY
39
P71/AN1
40
16,34,41
PM_SLP_S4#
P72/AN2
41
34,41
AC_PRESENT#
P73/AN3
42
21,33,34
DOCK_INTR#
P74/AN4
BT_WAKE
43
P75/AN5
TP_KSC_P76
44
P76/AN6/DA0
KBC_DISABLE#
45
P77/AN7/DA1
BT_ON
47
PA1/CIN9/KIN9#
48
15,27
PM_LANPWROK
PA0/CIN8/KIN8#
49
16,34
PM_PWRBTN#
P40/TMCI0
50
34,37
VR_ON
P41/TMO0
52
34,35
FAN_ON
P43/TMCI1/HIRQ11
53
16,18,22,34,36
PM_PWROK
P44/TMO1/HIRQ1
54
16,18,34
PM_RSMRST#
P45/TMR11/HIRQ12
55
5,16,18,34
PM_THRM#
P46/PWX0
56
34,41
SMC_SHUTDOWN
P47/PWX1
68
15,34
H_RCIN#
PB5/WUE5#
69
34
SMC_RSTGATE#
PB4/WUE4#
80
5,34
SMB_THRM_CLK
PB3/CS4#/WUE3#
81
5,34
SMB_THRM_DATA
PB2/CS3#/WUE2#
90
16,33,34
SMC_RUNTIME_SCI#
PB1/HIRQ4/WUE1#/LSCI
91
16,31,33,34
SMC_EXTSMI#
PB0/HIRQ3/WUE0#/LSMI#
93
16,33,34
SMC_WAKE_SCI#
P80/HA0/PME#
94
33,34
KBC_A20GATE
P81/CS2#/GA20
57
34
BAT_SUSPEND
PB7/WUE7#
58
16,33,34
PM_BATLOW#
PB6/WUE6#
BT_DETACH
97
P84/IRQ3#
TP_KSC_RES0
100
RESO#
RP9C
KSC Keyboard & System
10K
Management Controller
Note: for flash progamming, must use
TX1 and RX1, which are pin97 and pin98.
B
C
Boot Mode
Programming Straps
C339
C340
C341
C338
P90-P92 needs to be at VCC for boot mode
programming. They are already pulled up in
0.1UF
0.1UF
0.1UF
0.1UF
the design. MD0, MD1 needs to be at Vss.
Jumper for J21 needs to be populated.
System needs to supply +V3ALWAYS to
Program
J21
flash connector.
1
2
PA7/CIN15/KIN15#/PS2CD
PA6/CIN14/KIN14/PS2CC
PA3/CIN11/KIN11#/PS2AD
PA2/CIN10/KIN10#/PS2AC
PA5/CIN13/KIN13#/PS2BD
PA4/CIN12/KIN12#/PS2BC
P95/CS1#
P94/IOW#
P93/IOR#
P60/FTCI/CIN0/KIN0#
P61/FTOA/CIN1/KIN1#
P62/FTIA/CIN2/KIN2#/TMIY
P63/FTIB/CIN3/KIN3#
P64/FTIC/CIN4/KIN4#
P65/FTID/CIN5/KIN5#
P66/FTOB/CIN6/KIN6#/IRQ6#
P67/CIN7/KIN7#/IRQ7#
P27/PW15
P26/PW14
P25/PW13
P24/PW12
P23/PW11
P22/PW10
P21/PW9
H8S/2149F-Z
P20/PW8
P17/PW7
P16/PW6
P15/PW5
P14/PW4
P13/PW3
P12/PW2
P11/PW1
P10/PW0
P30/HDB0/LAD0
P31/HDB1/LAD1
P32/HDB2/LAD2
P33/HDB3/LAD3
P34/HDB4/LFRAME#
P35/HDB5/LRESET#
P36/HDB6/LCLK
P37/HDB7/SERIRQ
P82/CLKRUN#
P83/LPCPD#
P85/IRQ4#
P86/IRQ5#/SCL1
P42/TMRI0/SDA1
VSS1
VSS2
VSS3
VSS4
AVSS
J4
TP_KSC_RES0
1
TP_KSC_P76
2
TP_NMI_GATE#
3
NO_STUFF_CON3_HDR
C
D
10
KBC_GP_DATA 33
11
KBC_GP_CLK 33
30
KBC_MOUSE_DATA 33
31
KBC_MOUSE_CLK 33
20
KBC_KB_DATA 33
21
KBC_KB_CLK 33
KBC_CAPSLOCK
18
KBC_SCROLLOCK
19
KBC_NUMLOCK
22
KBC_SCANIN0
26
KBC_SCANIN1
27
KBC_SCANIN2
28
KBC_SCANIN3
29
KBC_SCANIN4
32
KBC_SCANIN5
33
KBC_SCANIN6
34
KBC_SCANIN7
35
KBC_SCANIN[7:0]
KBC_SCANOUT15
60
KBC_SCANOUT14
61
KBC_SCANOUT13
62
KBC_SCANOUT12
63
KBC_SCANOUT11
64
KBC_SCANOUT10
65
KBC_SCANOUT9
66
KBC_SCANOUT8
67
KBC_SCANOUT7
72
KBC_SCANOUT6
73
KBC_SCANOUT5
74
KBC_SCANOUT4
75
KBC_SCANOUT3
76
KBC_SCANOUT2
77
KBC_SCANOUT1
78
KBC_SCANOUT0
79
KBC_SCANOUT[15:0] 33
82
LPC_AD0 16,28,30,31,34
83
LPC_AD1 16,28,30,31,34
84
LPC_AD2 16,28,30,31,34
85
LPC_AD3 16,28,30,31,34
86
LPC_FRAME# 16,28,30,31,34
87
88
CLK_SMCPCI 14
89
INT_SERIRQ 15,19,20,21,31,34
95
PM_CLKRUN# 16,18,31,34
96
PM_SUS_STAT# 9,16,31,34
98
SMB_SC_INT# 34
SCL1
99
SDA1
Measurement Point
51
J13
+V3.3 7,9,15,17,20,24,27,32,34,36,40,41
15
70
71
92
RP9D
46
3
10K
Q20
BSS138
9,19,20,34
PCI_GATED_RST#
GATE OFF PCIRST# during S3
Title
System Management and Keyboard Controller
Size
Project:
855PM Platform
A
Date:
Monday, February 24, 2003
D
E
KSC
J12
Enable
1-2 (Default)
Disable
2-3
Decode KBC Addresses
J1
Enable 60h & 64h
No Shunt (Default)
Disable
Shunt
30
+V3.3ALWAYS_KBC
R34
R25
R14
240
240
240
DS4
DS3
DS1
GREEN
GREEN
GREEN
1
Q11
BSS138
1
Q6
BSS138
33
1
Q5
BSS138
Bluetooth
Sideband
+V3.3ALWAYS
5,9,16,17,18,19,20,24,25,26,33,34,36,41
J14
BT_WAKE
1
BT_ON
2
BT_DETACH
3
SMB_SB_CLK
4
SMB_SB_DATA
5
6
7
8
8Pin_HDR
9,15,19,20,21,30,31,34
BUF_PCI_RST#
2
SMC_RSTGATE#
Document Number
Rev
Sheet
29
of
47
E
4
3
2
1

Advertisement

Table of Contents
loading

Table of Contents