Agp Connector; Agp Decoupling Recommendations; Agp Vref Reference Voltage Dividers - Intel 855PM Design Manual

Platform Design Checklist
14.7.1.1.

AGP Connector

Pin Name
Pull up/Pull down
SERR#, PERR# Pull up to Vcc1_5
INTA#, INTB#
14.7.1.2.

AGP Decoupling Recommendations

Intel 855PM MCH Interface – High Frequency Decoupling Recommendations
Pin Name Configuration
Vcc1_5 Pull down to GND
14.7.1.3.

AGP VREF Reference Voltage Dividers

Pin Name
Pull up/Pull down
AGPREF Voltage divider
304
AGP Connector Resistor Recommendations
System
8.2 k
F
0.01 µF
MCH AGP Interface – Reference Voltage Dividers
System
1 k top)
1 k bottom)
Series
Damping
PERR# and SERR# are not supported in
the MCH. An external pull up to a 1.5 V
source is required for AGP controllers
that implement these signals.
Route to the ICH4-M PIRQ signals.
Qty
6 Place a minimum of six 0.01 µF within 70
mils of the outer row of balls on the MCH.
Place one extra 0.01 µF cap for every 10
vias that transition the AGP signal from
one reference signal plane to another.
Intel CRB uses 7x 0.1 µF, 1x 22 µF, and
1x 100 µF.
Notes
Source generated VREFs are recommended. See
Section 7.3.8 for more details.
See Figure 156 for impelementation on Intel CRB.
®
Intel 855PM Chipset Platform Design Guide
Notes
1
Notes
R