Topology 2C: Cmos Signals Driven By Intel 82801Dbm Ich4-M - Lint0/Intr, Lint1/Nmi, A20M#, Ignne#, Slp#, Smi#, And Stpclk; Figure 22. Routing Illustration For Topology 2C; Table 13. Layout Recommendations For Topology 2C - Intel 855PM Design Manual

FSB Design Guidelines
4.1.4.1.6. Topology 2C: CMOS Signals Driven by Intel 82801DBM ICH4-M – LINT0/INTR,
LINT1/NMI, A20M#, IGNNE#, SLP#, SMI#, and STPCLK#
The Topology 2C CMOS LINT0/INTR, LINT1/NMI, A20M#, IGNNE#, SLP#, SMI#, and STPCLK#
signals should implement a point-to-point connection between the Intel 82801DBM ICH4-M and the
processor. The routing guidelines allow both signals to be routed as either micro-strip or strip-lines
using 55
for this topology.

Figure 22. Routing Illustration for Topology 2C

Table 13. Layout Recommendations for Topology 2C

L1
0.5" – 12.0"
0.5" – 12.0"
58
± 15% characteristic trace impedance. No additional motherboard components are necessary
Intel
Pentium M
processor
Transmission Line Type
Micro-strip
Strip-line
Intel
ICH4-M
L1
®
Intel 855PM Chipset Platform Design Guide
R