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FSB Design Guidelines
4.2.
Intel System Validation Debug Support
In any PC design, it is critical to enable industry-standard tools to allow for debug of a wide range of
issues that arise in the normal design cycle. In a mobile design, electrical/logic visibility is very limited,
and often making progress on debugging such issues is very time consuming. In some cases progress is
not possible without board redesign or extensive rework. Two topics in particular are very important to
general system debug capabilities: ITP support and processor logic analyzer support (FSB LAI)
4.2.1.
In Target Probe (ITP) Support
4.2.1.1.
Background and Justification
The In Target Probe (ITP) is needed to debug BIOS, logic, signal integrity, general software, and
general hardware issues involving CPUs, chipsets, SIOs, PCI devices, and other hardware in a design.
The ITP is widely used by validation, test, and debug groups within Intel (as well as by third party BIOS
vendors, OEMs, and other developers).
Note: Any Intel 855PM chipset based systems designed without ITP support may prevent assistance from
various Intel validation, test, and debug groups. For this reason, it is critical piece that ITP support is
provided. This can be done with zero additional BOM cost, and very minimal layout/footprint costs.
However, the cost for not providing this support can be anywhere from none (if there are no blocking
issues found in the system design) to schedule slips of a month or more. The latter scenario represents
the time needed to spin a board design and required assembly time to add an ITP port when it is
absolutely required and other mechanical and routing issues prevent the use of an ITP interposer, if one
exists.
4.2.1.2.
Implementation
To minimize the ITP connector footprint, the ITP700FLEX alternative is a better option for mobile
designs. Note that the termination values do not need to be stuffed (thus zero additional BOM cost).
However, standard signal connection guidelines for the CPU's TAP logic signals for the non-ITP case
still need to be followed. In other words, only the traces and component footprints need to be added to
the design, with all previous "non-ITP" guidelines followed otherwise. This way, when ITP support is
needed, the termination values and connector can be populated as needed for debug support. Note also
that if the ITP700FLEX footprint cannot be followed due to mechanical, routing, or footprint reasons, it
is acceptable to have a simple via grouping in lieu of the connector to allow for "blue-wiring" of the
ITP. This assumes that all signal topology and routing guidelines are still adhered to on the motherboard
and the "blue-wiring" from the signal vias to the ITP700FLEX connector is as short as possible.
4.2.2.
Processor Logic Analyzer Support (FSB LAI)
4.2.2.1.
Background and Justification
The second key tool that is needed to debug BIOS, logic, signal integrity, general software, and general
hardware issues involving CPUs, chipsets, SIOs, PCI devices, and other hardware in platform design is
the FSB Logic Analyzer probe (FSB LAI). This critical tool is widely used by various validation, test,
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Intel
855PM Chipset Platform Design Guide
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