Intel 855PM Design Manual page 281

R
Pin Name System
Pull up/Pull
down
VCC[71:0] Tie to
VCC[Vcc_Core]
VCCA[3:0] Tie to Vcc1_8
VCCP[26:0] Tie to VCCP
VCCSENSE Pull down to GND
VSS[191:0] Tie to GND
VSSSENSE Pull down to GND
NOTE: Default tolerance for resistors is ± 5% unless otherwise specified.
®
Intel 855PM Chipset Platform Design Guide
Intel Pentium M/Intel Celeron M Processor – Resistor Recommendations
54.9 ± 1%
(Default: No Stuff)
Intel Pentium M/Intel Celeron M Processor – GND Signals
54.9 ± 1%
(Default: No Stuff)
Series Termination
Resistor (
72 VCC pins
See layout example in Section 5.3.
Also see Section 14.4.4 for decoupling.
27 VCCP pins
Stuffing option for 54.9
down to GND should be provided for
testing purposes. For normal operation,
resistor should be No Stuff.
Also, a test point for a differential probe
ground should be placed between the
two termination resistors of VCCSENSE
and VSSSENSE.
192 VSS pins
Stuffing option for 54.9
down to GND should be provided for
testing purposes. For normal operation,
resistor should be No Stuff.
Also, a test point for a differential probe
ground should be placed between the
two termination resistors of VCCSENSE
and VSSSENSE.
Platform Design Checklist
1
Notes
± 1% pull
± 1% pull
281