Interrupt Detection Enable Register (Irden) 0Xf600 - Toshiba TX49 TMPR4937 Manual

64-bit tx system risc
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15.4.1
Interrupt Detection Enable Register (IRDEN)
31
15
Bit(s)
Mnemonic
Field Name
31:1
Interrupt Control
0
IDE
Enable
Reserved
Reserved
Reserved
Interrupt Detection Enable (Default: 0)
Enables interrupt detection.
0: Stop interrupt detection.
1: Start interrupt detection
Figure 15.4.1 Interrupt Detection Enable Register
15-11
Chapter 15 Interrupt Controller
0xF600
Explanation
16
: Type
: Default
1
0
IDE
R/W : Type
0
: Default
Read/Write
R/W

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