Table of Contents
Advertisement
(4) External memory expansion
•
Expandable up to 16 Mbytes (Shared program/data area)
•
Can simultaneously support 8-/16-bit width external data bus
･･･Dynamic data bus sizing
•
Separate bus system
(5) Memory controller
•
Chip select output: 4 channels
(6) 8-bit timers: 4 channels
(7) 16-bit timers: 2 channels
(8) General-purpose serial interface: 2 channels
•
UART/synchronous mode
•
IrDA
(9) Serial bus interface: 1 channel
•
I
C bus mode
2
•
Clock synchronous mode
(10) 10-bit AD converter: 8 channels
(11) Watchdog timer
(12) Interrupts: 41 interrupts
•
9 CPU interrupts: Software interrupt instruction and illegal instruction
•
25 internal interrupts: Seven selectable priority levels
•
7 external interrupts: Seven selectable priority levels (INT0 to INT5 and
(13) Input/output ports: 50 pins (exclude Data bus 8-bit, Address bus 24-bit and
(14) Standby function
•
Three HALT modes: IDLE2 (Programmable), IDLE1, STOP
(15) Dual-clock controller
•
PLL: fc = f
OSCH
•
Clock gear function: Select a high-frequency clock fc to fc/16
(16) Operating voltage
•
DVCC = 3.0 V to 3.6 V (fc max = 40 MHz)
(17) Package
•
100-pin QFP: P-LQFP100-1414-0.50F
(INT0 to INT3 selectable edge or level interrupt)
× 4 (fc = 40 MHz at f
OSCH
92CM22-2
= 10 MHz)
TMP92CM22
)
NMI
pin)
RD
2007-02-16
Advertisement
Table of Contents
