Motorola DSP56800 Manual page 363

MPYSU
Condition Codes Affected:
15 14
*
LF
See Section 3.6.5, "16-Bit Destinations," on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
Instruction Fields:
Operation
MPYSU
Timing:
2 oscillator clock cycles
Memory:
1 program word
Signed Unsigned Multiply
MR
13 12 11 10 9
* * * *
I1
E — Set if the signed integer portion of A or B result is in use
U — Set according to the standard definition of the U bit
N — Set if bit 35 of A or B result is set except during saturation
Z — Set if A or B result equals zero
V — Set if overflow has occurred in A or B result
Operands C
X0,Y1,FDD 2
X0,Y0,FDD
Y0,Y1,FDD
Y0,Y0,FDD
Y0,A1,FDD
Y1,B1,FDD
Instruction Set Details
CCR
8 7 6 5 4 3
E U N
I0 SZ L
W
1 Signed or unsigned 16x16 fractional multiply with
32-bit result.
The first operand is treated as signed and the sec-
ond as unsigned.
MPYSU
2 1 0
Z V
C
Comments
A-133