Nested Loops; Recommendations - Motorola DSP56800 Manual

Software Techniques
; Software Looping
; Data ALU Register Used for Loop Count
MOVE #3,X0
LABEL
; (instructions)
DECW X0
BGT LABEL
; Software Looping
; AGU Register Used for Loop Count
MOVE #3-1,R0
LABEL
; (instructions)
TSTW (R0)-
BGT LABEL
; Software Looping
; Memory Location (one of first 64 XRAM locations) Used for Loop Count
MOVE #3,X:$7
LABEL
; (instructions)
DECW X:$7
BGT LABEL
8.6.4

Nested Loops

This section gives recommendations for and a detailed discussion of nested loops.
8.6.4.1

Recommendations

For nested looping it is recommended that the innermost loop be a hardware DO loop when appropriate
and that all outer loops be implemented as software loops. Even though it is possible to nest hardware DO
loops, it is better to implement all outer loops using software looping techniques for two reasons:
1. The DSP56800 allows only two nested hardware DO loops.
2. The execution time of an outer hardware loop is comparable to the execution time of a
software loop.
Likewise, there is little difference in code size between a software loop and an outer loop implemented
using the hardware DO mechanism.
The hardware nesting capability of DO loops should instead be used for efficient interrupt servicing. It is
recommended that the main program and all subroutines use no nested hardware DO loops. It is also
recommended that software looping be used whenever there is a JSR instruction within a loop and the
called subroutine requires the hardware DO loop mechanism. If these two rules are followed, then it can be
guaranteed that no more than one hardware DO loop is active at a time. If this is the case, then the second
HWS location is always available to ISRs for faster interrupt processing. This significantly reduces the
amount of code required to free up and restore the hardware looping resources such as the HWS when
entering and exiting an ISR, since it is already known upon entering the ISR that a HWS location is
available.
If this technique is used, the ISRs should not themselves be interruptible, or, if they can be interrupted,
then any ISR that can interrupt an ISR already in progress must save off one HWS location. See
Section 8.12, "Freeing One Hardware Stack Location."
The following code shows the recommended nesting technique:
8-22
; Load loop count to execute the loop three times
; Enters loop at least once
; Back to top-of-loop if positive and not 0
; Load loop count to execute the loop three times
; Enters loop at least once
; Back to top-of-loop if positive and not 0
; Load loop count to execute the loop three times
; Enters loop at least once
; Back to top-of-loop if positive and not 0
DSP56800 Family Manual