Motorola DSP56800 Manual page 381

RND
Condition Codes Affected:
15 14
LF *
Note:
If the CC bit is set and bit 31 of the result is set, then N is set. If the CC bit is set and bits 31–0 of the
result equal zero, then Z is set. The rest of the bits are unaffected by the setting of the CC bit.
Instruction Fields:
Operation
RND
Data ALU Operation
Operation
RND
Timing: 2 + mv oscillator clock cycles
Memory: 1 program word
Round Accumulator
MR
13 12 11 10 9
* * * * I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L — Set if limiting (parallel move) or overflow has occurred in result
E — Set if the signed integer portion of A or B result is in use
U — Set according to the standard definition of the U bit
N — Set if bit 35 of A or B result is set except during saturation
Z — Set if A or B result equals zero
V — Set if overflow has occurred in A or B result
Operands C
F 2
Registers
A
B
Instruction Set Details
CCR
8 7 6 5 4
I0 SZ L E U N
W
1 Round
Parallel Memory Read or Write
Memory Access Source or Destination
X:(Rn)+
X:(Rn)+N
RND
3 2 1 0
Z V C
Comments
X0
Y1
Y0
A1
B1
A
B
A-151