Motorola DSP56800 Manual page 371

NOTC
Instruction Fields:
Operation
NOTC
Timing:
Refer to the preceding Instruction Fields table
Memory:
Refer to the preceding Instruction Fields table
Logical Complement with Carry
Operands C
DDDDD 4
X:(R2+xx) 6
X:(SP-xx) 6
X:aa 4
X:pp 4
X:xxxx 6
Instruction Set Details
W
2 One's-complement (bit-wise negation).
2
All registers in DDDDD are permitted except HWS.
2
X:aa represents a 6-bit absolute address. Refer to
Absolute Short Address (Direct Addressing):
2
<aa> on page 4-22.
2
X:pp represents a 6-bit absolute I/O address. Refer
to I/O Short Address (Direct Addressing): <pp>
3
on page 4-23.
NOTC
Comments
A-141