Motorola DSP56800 Manual page 342

MOVE
Operation:
X:<ea> → D
<op>
S → X:<ea>
<op>
<op> refers to any arithmetic instruction that allows parallel moves. Examples include ADD, DECW, MACR, NEG,
SUB, TFR, and so on.
Description: Perform a data ALU operation and, in parallel, move the specified register from or to X data memory.
Two indirect addressing modes may be used (post-increment by one and post-increment by the offset
register).
Seventeen data ALU instructions allow the capability of specifying an optional single parallel move.
These data ALU instructions have been selected for optimal performance on the critical sections of fre-
quently used DSP algorithms. A summary of the different data ALU instructions, registers used for the
memory move, and addressing modes available for the single parallel move is shown in Table 6-34,
"Data ALU Instructions—Single Parallel Move," on page 6-29.
If the arithmetic operation of the instruction specifies a given source register (S) or destination register
(D), that same register or portion of that register may be used as a source in the parallel data bus move
operation. This allows data to be moved in the same instruction in which it is being used as a source
operand by a data ALU operation. That is, duplicate sources are allowed within the same instruction.
Examples of duplicate sources include the following:
ADD
ADD
Description: If the arithmetic operation portion of the instruction specifies a given destination accumulator, that
same accumulator or portion of that accumulator may not be specified as a destination in the parallel
data bus move operation. Thus, if the opcode-operand portion of the instruction specifies the 36-bit A
or B accumulator as its destination, the parallel data bus move portion of the instruction may not spec-
ify A0/B0, A1/B1, A2/B2, or A/B as its destination. That is, duplicate destinations are not allowed
within the same instruction. Examples of duplicate destinations include the following:
ADD
ASL
Exceptions:
TST, CMP, and CMPM allow both the accumulator and its lower portion (A and A0, B and B0) to be
the parallel move destination even if this accumulator is used by the data ALU operation. These in-
structions do not have a true destination.
A-112
Parallel Move—Single Parallel Move
Assembler Syntax:
<op>
<op>
A,B A,X:(R2)+
A,B X:(R2)+,A
B,A X:(R2)+,A
A X:(R2)+,A
DSP56800 Family Manual
X:<ea>,D
S,X:<ea>
; A register allowed as source of
; parallel move
; A register allowed as destination
; of parallel move
; NOT ALLOWED--A register used twice
; as a destination
; NOT ALLOWED--A register used twice
; as a destination
MOVE