Motorola DSP56800 Manual page 299

DEC(W)
Operation:
D2:D1-1 → D2:D1
Description: Decrement a 16-bit destination or the two upper portions (A2:A1 or B2:B1) of a 36-bit accumulator.
If the destination is a 36-bit accumulator, leave the LSP (A0 or B0) unchanged.
Usage:
This instruction is typically used when processing integer data.
Example:
DECW
A Before Execution
0 0001
A2 A1
Explanation of Example:
Prior to execution, the 36-bit A accumulator contains the value $0:0001:0033. Execution of the
DECW A instruction decrements by one the upper 20 bits of the A accumulator.
Condition Codes Affected:
15 14
LF *
See Section 3.6.5, "16-Bit Destinations," on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
Instruction Fields:
Operation
DEC(W)
Decrement Word
(parallel move)
A X:(R2)+,X0
0033
A0
MR
13 12 11 10 9
* * * * I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L — Set if limiting (parallel move) or overflow has occurred in result
E — Set if the signed integer portion of the result is in use
U — Set if result is unnormalized
N — Set if bit 35 of the result is set except during saturation
Z — Set if the 20 MSBs of the result are all zeros
V — Set if overflow has occurred in result
C — Set if a carry (or borrow) occurs from bit 35 of the result
Operands C
FDD 2
X:(SP-xx) 8
X:aa 6
X:xxxx 8
Instruction Set Details
Assembler Syntax:
DECW D
; Decrement the 20 MSBs of A and then
; update R2,X0
A After Execution
0 0000
A2 A1
CCR
8 7 6 5 4
SZ L E U
I0
W
1 Decrement word
1 Decrement word in memory using appropriate
addressing mode.
1
X:aa represents a 6-bit absolute address. Refer to
2
Absolute Short Address (Direct Addressing):
<aa> on page 4-22.
DEC(W)
(parallel move)
0033
A0
3 2 1 0
N Z V C
Comments
A-69