Multi-Precision Operations; Multi-Precision Addition And Subtraction; Multi-Precision Multiplication - Motorola DSP56800 Manual

Example 3-11. Multiplying Two Unsigned Fractional Values
MOVE X:FIRST,X0
ANDC #$7FFF,X0
MOVE X:SECOND,Y0
MPYSU X0,Y0,A
TSTW X:FIRST
BGE OVER
MOVE #$0,B
MOVE Y0,B1
ADD B,A
OVER
(ASR A)
3.3.8

Multi-Precision Operations

The DSP56800 instruction set contains several instructions which simplify extended- and multi-precision
mathematical operations. By using these instructions, 64-bit and 96-bit calculations can be performed, and
calculations involving different-sized operands are greatly simplified.
3.3.8.1

Multi-Precision Addition and Subtraction

Two instructions, ADC and SBC, assist in performing multi-precision addition (Example 3-12) and
subtraction (Example 3-13), such as 64-bit or 96-bit operations.
X:$1:X:$0:Y1:Y0 + A2:A1:A0:B1:B0 = A2:A1:A0:B1:B0
(B2 must contain only sign extension before addition begins;
that is, bits 35–31 are all 1s or 0s)
MOVE X:$21,B
MOVE X:$20,B0
ADD Y,B
MOVE X:$0,Y0
MOVE X:$1,Y1
ADC Y,A
A2:A1:A0:B1:B0 - X:$1:X:$0:Y1:Y0 = A2:A1:A0:B1:B0
(B2 must contain only sign extension before addition begins;
that is, bits 35–31 are all 1s or 0s)
MOVE X:$21,B
MOVE X:$20,B0
SUB Y,B
MOVE X:$0,Y0
MOVE X:$1,Y1
SBC Y,A
3.3.8.2

Multi-Precision Multiplication

Two instructions are provided to assist with multi-precision multiplication. When these instructions are
used, the multiplier accepts one signed and one unsigned two's-complement operand. The instructions are:
• MPYSU—multiplication with one signed and one unsigned operand
; Get first operand from memory
; Force first operand to be positive
; Get second operand from memory
; Perform final addition if MSB of first operand was a one
; If first operan is less that one, jump to OVER
; Move Y0 to B without sign extension
; Optionally convert to integer result
Example 3-12. 64-Bit Addition
; Correct sign extension
; First 32-bit addition
; Get second 32-bit operand from memory
; Second 32-bit addition
Example 3-13. 64-Bit Subtraction
; Correct sign extension
; First 32-bit subtraction
; Get second 32-bit operand from memory
; Second 32-bit subtraction
Data Arithmetic Logic Unit
Fractional and Integer Data ALU Arithmetic
3-23