Once Port Capabilities; Once Port Architecture - Motorola DSP56800 Manual

As emulation capabilities are necessarily tied to the particular implementation of a DSP56800-based
device, the appropriate device's user's manual should be consulted for complete details on implementation
and supported functions.
9.3.1

OnCE Port Capabilities

The capabilities of the OnCE port include the following:
• Interrupting and breaking into debug mode on a program memory address
• Interrupting and breaking into debug mode on a data memory address (read, write, or access)
• Interrupting and breaking into debug mode on an on-chip peripheral register access
• Entering debug mode using a microprocessor instruction
• Examining or modifying the contents of any core or memory-mapped peripheral register
• Examining or modifying any desired sections of program or data memory
• Full-speed stepping on one or more instructions (up to 256)
• Tracing one or more instructions
• Saving or restoring the current state of the chip's pipeline
• Displaying the contents of the real-time instruction trace buffer
• Returning to user mode from debug mode
Depending on the implementation for a particular DSP56800-based device, additional debugging and
emulation capabilities may be provided. Consult the user's manual for the device in question for more
information.
9.3.2

OnCE Port Architecture

The OnCE port module is composed of four different sub-modules, each of which performs a different
task:
• Command, status, and control
• Breakpoint and trace
• Pipeline save and restore
• FIFO history buffer
These units, and the overall once port architecture, are shown in Figure 9-3 on page 9-6.
JTAG and On-Chip Emulation (OnCE™)
OnCE Port
9-5