General 32-Bit Arithmetic Right Shifts; General 32-Bit Logical Right Shifts - Motorola DSP56800 Manual

8.2.3

General 32-Bit Arithmetic Right Shifts

It is possible to perform right shifting of up to 15 bits on 32-bit values using the techniques presented in
this section.
The following example shows how to arithmetically shift the 32-bit contents of the Y1:Y0 registers,
storing the results into the A accumulator. Note that this technique uses many of the data ALU registers:
Y1 and Y0 to hold the value to be shifted, X0 to hold the amount to be shifted, and the A accumulator to
store the result. The following code allows shifts of 0 to 15 bits and executes in five instruction cycles.
; Arithmetically Shift Y1:Y0 Register Combination by 8 bits
; Emulated in 5 Icyc, 5 Instruction Words
MOVE
LSRR
MOVE
MOVE
ASRAC
If it is necessary to shift by more than 15 bits, then the following code should be preceded by a shift of 16
bits, as documented later in this section.
Similar code that follows shows how to arithmetically shift the 32-bit value in the A accumulator. Again,
this technique takes several registers: Y1 to hold the most significant word (MSW) to be shifted and Y0 to
hold the amount to be shifted. This, perhaps, is only useful when the amount to be shifted is a variable
amount or when the amount to be shifted is eight or more and the Y1 and Y0 registers are available. Note
that the extension register (A2) is not shifted in this case.
; Arithmetically Shift A1:A0 Accumulator by 11 bits
; Emulated in 7 Icyc, 7 Instruction Words
MOVE
MOVE
MOVE
LSRR
MOVE
MOVE
ASRAC
8.2.4

General 32-Bit Logical Right Shifts

Right shifting logically is identical to right shifting arithmetically except for the final shift instruction. For
arithmetic shifts of 32-bit values the final instruction is an ASRAC instruction, and for logical shifts of
32-bit values the final instruction is a LSRAC instruction. This is shown in the following code:
; Logically Shift Y1:Y0 Register Combination by 8 bits
; Emulated in 5 Icyc, 5 Instruction Words
MOVE
LSRR
MOVE
MOVE
LSRAC
#8,X0
Y0,X0,A
A1,A0
A2,A1
Y1,X0,A
#11,Y0
A1,Y1
A0,A1
A1,Y0,A
A1,A0
A2,A1
Y1,Y0,A
#8,X0
Y0,X0,A
A1,A0
A2,A1
Y1,X0,A
Software Techniques
16- and 32-Bit Shift Operations
; Logically shift lower word
; 16-bit arithmetic right shift
; Arithmetically shift upper word and
; combine with lower word
; Save copy of A1 register (upper word
; to be shifted)
; Logically shift lower word
; 16-bit arithmetic right shift
; Arithmetically shift upper word and
; combine with lower word
; Logically shift lower word
; 16-bit arithmetic right shift
; Logically shift upper word and
; combine with lower word
8-9