I/O Short Address (Direct Addressing): <Pp; Implicit Reference; Addressing Modes Summary; Figure 4-14 Special Addressing: I/O Short Address - Motorola DSP56800 Manual

4.2.4.3 I/O Short Address (Direct Addressing): <pp>
For the I/O short addressing mode, the address of the operand occupies 6 bits in the instruction operation
word and is one-extended. This allows direct access to the last 64 locations in X memory, which contain
the on-chip peripheral registers. No registers are used to form the address of the operand. See Figure 4-14
for examples of using the I/O short direct addressing mode.
I/O Short Address Example
R3
15
15
$FFFF
$FFFB
Assembler syntax: X:<pp>
Additional instruction execution cycles: 0
Additional effective address program words: 0
4.2.5

Implicit Reference

Some instructions make implicit reference to the program counter (PC), software stack, hardware stack
(HWS), loop address register (LA), loop counter (LC), or status register (SR). The implied registers and
their use are defined by the individual instruction descriptions. See Appendix A, "Instruction Set Details,"
for more information.
4.2.6

Addressing Modes Summary

Table 4-8 on page 4-24 contains a summary of the addressing modes discussed in the preceding
subsections of Section 4.2.
Before Execution
XXXX
0
X Memory
0
5 6 7 8
Figure 4-14. Special Addressing: I/O Short Address
Address Generation Unit
: MOVE X:<<$FFFB,R3
R3
15
15
$FFFF
$FFFB
Addressing Modes
After Execution
$5678
0
X Memory
0
5 6 7 8
AA0027
4-23