Motorola DSP56800 Manual page 260

ADC
Operation:
S + C + D → D
(no parallel move)
Description: Add the source operand (S) and C to the destination operand (D) and store the result in the destination
accumulator. Long words (32 bits) may be added to the (36-bit) destination accumulator.
Usage:
This instruction is typically used in multi-precision addition operations (see Section 3.3.8, "Multi-Pre-
cision Operations," on page 3-23) when it is necessary to add together two numbers that are larger than
32 bits (such as 64-bit or 96-bit addition).
Example:
ADC
Before Execution
0 2000
A2 A1
Y 2000
Y1
Explanation of Example:
Prior to execution, the 32-bit Y register, comprised of the Y1 and Y0 registers, contains the value
$2000:8000, and the 36-bit accumulator contains the value $0:2000:8000. In addition, C is set to one.
The ADC instruction automatically sign extends the 32-bit Y registers to 36 bits and adds this value to
the 36-bit accumulator. In addition, C is added into the LSB of this 36-bit addition. The 36-bit result
is stored back in the A accumulator, and the condition codes are set correctly. The Y1:Y0 register pair
is not affected by this instruction.
Note:
C is set correctly for multi-precision arithmetic, using long word operands only when the extension
register of the destination accumulator (A2 or B2) contains sign extension of bit 31 of the destination
accumulator (A or B).
A-30
Add Long with Carry
Assembler Syntax:
ADC
Y,A
8000
A0
8000
Y0
SR
0301
DSP56800 Family Manual
S,D (no parallel move)
After Execution
0 4001
A2 A1
Y 2000
Y1
SR
ADC
0001
A0
8000
Y0
0300