Motorola DSP56800 Manual page 261

16-bit digital signal processor
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ADC
Condition Codes Affected:
15
14
LF
See Section 3.6.5, "16-Bit Destinations," on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
Instruction Fields:
Operation
ADC
Timing:
2 oscillator clock cycles
Memory:
1 program word
Add Long with Carry
MR
13
12
11
10
9
*
*
*
*
*
I1
L
— Set if overflow has occurred in result
E
— Set if the signed integer portion of A or B result is in use
U
— Set according to the standard definition of the U bit
N
— Set if bit 35 of A or B result is set except during saturation
Z
— Set if A or B result is zero; cleared otherwise
V
— Set if overflow has occurred in A or B result
C
— Set if a carry (or borrow) occurs from bit 35 of A or B result
Operands
C
Y,F
Instruction Set Details
CCR
8
7
6
5
4
L
E
U
I0
SZ
W
2
1
Add with carry (sets C bit also)
ADC
3
2
1
0
N
Z
V
C
Comments
A-31

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