Table 6-27 Data Alu Shifting Instructions - Motorola DSP56800 Manual

16-bit digital signal processor
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Instruction Set Introduction
Operation
ASL
ASLL
ASR
ASRR
ASRAC
LSL
LSR
LSRR
LSRAC
ROL
ROR
6-24
Table 6-27. Data ALU Shifting Instructions
Operands
C
FDD
2
Y1,X0,FDD
2
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
FDD
2
Y1,X0,FDD
2
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Y1,X0,F
2
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
FDD
2
FDD
2
Y1,X0,FDD
2
Y0,X0,FDD
Y1,Y0,FDD
Y0,Y0,FDD
A1,Y0,FDD
B1,Y1,FDD
Y1,X0,F
2
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
FDD
2
FDD
2
DSP56800 Family Manual
W
Comments
1
Arithmetic shift left entire register by 1 bit
1
Arithmetic shift left of the first operand by value
specified in four LSBs of the second operand;
places result in FDD
1
Arithmetic shift right entire register by 1 bit
1
Arithmetic shift right of the first operand by
value specified in four LSBs of the second
operand; places result in FDD
1
Arithmetic word shifting with accumulation
1
1-bit logical shift left of word
1
1-bit logical shift right of word
1
Logical shift right of the first operand by value
specified in four LSBs of the second operand;
places result in FDD (when result is to an accu-
mulator F, zero extends into F2)
1
Logical word shifting with accumulation
1
Rotate 16-bit register left by 1 bit through the
carry bit
1
Rotate 16-bit register right by 1 bit through the
carry bit

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