Table 4-4 Addressing Mode-Address Register Indirect - Motorola DSP56800 Manual

Address Generation Unit
modes specify that the operand is (or operands are) in memory and provide the specific address(es) of the
operand(s). A portion of the data bus movement field in the instruction specifies the memory reference to
be performed. The type of address arithmetic used is specified by the address modifier register.
Table 4-4. Addressing Mode—Address Register Indirect
Addressing Mode:
Address Register Indirect
Post-increment
Post-update by offset N
No update
Post-increment
Post-decrement
Post-update by offset N or N3
available for word accesses only
Indexed by offset N
Indexed by 6-bit displacement
R2 and SP registers only
Indexed by 16-bit displacement
1. Rj represents one of the four pointer registers R0-R3; Rn is any of the AGU address
registers R0-R3 or SP.
Address-register-indirect modes may require an offset and a modifier register for use in address
calculations. The address register (Rn or SP) is used as the address register, the shared offset register is
used to specify an optional offset from this pointer, and the modifier register is used to specify the type of
arithmetic performed.
Some addressing modes are only available with certain address registers (Rn). For example, although all
address registers support the "indexed by long displacement" addressing mode, only the R2 address
register supports the "indexed by short displacement" addressing mode. For instructions where two reads
are performed from the X data memory, the second read using the R3 pointer must always be from on-chip
memory. The addressed register sets are summarized in Table 4-5.
4-8
Notation in the Instruction
Set Summary
Accessing Program (P) Memory
P:(Rj)+
P:(Rj)+N
Accessing Data (X) Memory
X:(Rn)
X:(Rn)+
X:(Rn)-
X:(Rn)+N
X:(Rn+N)
X:(R2+xx)
X:(SP-xx)
X:(Rn+xxxx)
DSP56800 Family Manual
Examples
1
P:(R0)+
P:(R3)+N
X:(R3)
X:(N)
X:(SP)
X:(R1)+
X:(SP)+
X:(R3)-
X:(N)-
X:(R1)+N
X:(R2+N)
X:(SP+N)
X:(R2+15)
X:(SP-$1E)
X:(R0-97)
X:(N+1234)
X:(SP+$03F7)