Motorola DSP56800 Manual page 267

ANDC
Instruction Fields:
Operation
BFCLR
Timing:
Refer to the preceding Instruction Fields table
Memory:
Refer to the preceding Instruction Fields table
Logical AND, Immediate
Operands C
#xxxx,DDDDD 4
#xxxx,X:(R2+xx) 6
#xxxx,X:(SP-xx) 6
#xxxx,X:aa 4
#xxxx,X:pp 4
#xxxx,X:xxxx 6
Instruction Set Details
W
2 Absolute value.
All registers in DDDDD are permitted except HWS.
2
X:aa represents a 6-bit absolute address. Refer to
2
Absolute Short Address (Direct Addressing):
<aa> on page 4-22.
2
X:pp represents a 6-bit absolute I/O address. Refer
2
to I/O Short Address (Direct Addressing): <pp>
on page 4-23.
3
ANDC
Comments
A-37