Motorola DSP56800 Manual page 297

16-bit digital signal processor
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CMP
Condition Codes Affected:
15
14
LF
*
See Section 3.6.5, "16-Bit Destinations," on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, "36-Bit Destinations—CC Bit Set," on page 3-34 and Section 3.6.4, "20-Bit Desti-
nations—CC Bit Set," on page 3-34 for the case when the CC bit is set.
Instruction Fields:
Operation
CMP
Data ALU Operation
Operation
CMP
Timing:
Refer to the preceding Instruction Fields table
Memory:
Refer to the preceding Instruction Fields table
Compare
MR
13
12
11
10
9
*
*
*
*
I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
— Set if limiting (parallel move) or overflow has occurred in result
E
— Set if the signed integer portion of the result is in use
U
— Set if result is not normalized
N
— Set if bit 35 of the result is set except during saturation
Z
— Set if result equals zero
V
— Set if overflow has occurred in result
C
— Set if a carry (or borrow) occurs from bit 35 of the result
Operands
C
DD,FDD
2
F1,DD
~F,F
X:(SP-xx),FDD
6
X:aa,FDD
4
X:xxxx,FDD
6
#xx,FDD
4
#xxxx,FDD
6
Registers
X0,F
Y1,F
Y0,F
A,B
B,A
(F = A or B)
Instruction Set Details
CCR
8
7
6
5
4
SZ
L
E
U
I0
W
1
36-bit compare of two accumulators or data reg
1
Compare memory word with 36 bit accumulator.
1
X:aa represents a 6-bit absolute address. Refer to
Absolute Short Address (Direct Addressing):
2
<aa> on page 4-22.
Note: Condition codes set based on 36-bit result
1
Compare acc with an immediate integer 0–31
2
Compare acc with a signed 16-bit immediate
Parallel Memory Read or Write
Memory Access
Source or Destination
X:(Rn)+
X:(Rn)+N
CMP
3
2
1
0
N
Z
V
C
Comments
X0
Y1
Y0
A
B
A1
B1
A-67

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