Bit-Manipulation Instructions; Table 6-4 Logical Instructions List; Table 6-5 Bit-Field Instruction List - Motorola DSP56800 Manual

Instruction Set Introduction
Instruction
AND
EOR
LSL
LSLL
LSRAC
LSR
LSRR
NOT
OR
ROL
ROR
6.4.3

Bit-Manipulation Instructions

The bit-manipulation instructions perform one of three tasks:
• Testing a field of bits within a word
• Testing and modifying a field of bits in a word
• Conditionally branching based on a test of bits within the upper or lower byte of a word
Bit-field instructions can operate on any X memory location, peripheral, or DSP core register. BFTSTH
and BFTSTL can test any field of the bits within a 16-bit word. BFSET, BFCLR, and BFCHG can test any
field of the bits within a 16-bit word and then set, clear, or invert bits in this word, respectively. BRSET
and BRCLR can only test an 8-bit field in the upper or lower byte of the word, and then conditionally
branch based on the result of the test. The carry bit of the condition code register contains the result of the
bit test for each instruction. These instructions are operations of the read-modify-write type. The BFTSTH,
BFTSTL, BFSET, BFCLR, and BFCHG instructions execute in two or three instruction cycles. The
BRCLR and BRSET instructions execute in four to six instruction cycles.
Table 6-5 lists the bit-manipulation instructions.
Instruction
ANDC
BFCLR
BFSET
BFCHG
BFTSTL
6-8
Table 6-4. Logical Instructions List
Description
Logical AND
Logical exclusive OR
Logical shift left
Multi-bit logical shift left
Logical right shift with accumulate
Logical shift right
Multi-bit logical shift right
Logical complement
Logical inclusive OR
Rotate left
Rotate right
Table 6-5. Bit-Field Instruction List
Description
Logical AND with immediate data
Bit-field test and clear
Bit-field test and set
Bit-field test and change
Bit-field test low
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