Motorola DSP56800 Manual page 397

Tcc
Example:
CMP
TGT
Explanation of Example:
In this example, the contents of the 16-bit X0 register are transferred to the 36-bit A accumulator, and
the contents of the 16-bit R0 address register are transferred to the 16-bit R1 address register if the
specified condition is true. If the specified condition is not true, a NOP is executed.
Condition Codes Affected:
The condition codes are tested but not modified by this instruction.
Instruction Fields:
Data ALU Transfer
Operation
Source
Tcc DD
A
B
DD
A
B
Note: The Tcc instruction does not allow the following condition codes: HI, LS, NN, and NR.
Timing:
2 oscillator clock cycles
Memory:
1 program word
Transfer Conditionally
X0,A ; compare X0 and A (sort for minimum)
R0,R1; transfer X0 → A and R0 → R1 if X0 < A
X0,A
AGU Transfer
Destination Source
F (No transfer)
B (No transfer)
A (No transfer)
F R0
B R0
A R0
Instruction Set Details
C W
Destination
2 1
2 1
2 1
R1 2 1
R1 2 1
R1 2 1
Tcc
Comments
Conditionally transfer one
register
Conditionally transfer one
data ALU register and one
AGU register
A-167