A.4.1.4 Unnormalized (U)—Bit 4; A.4.1.5 Negative (N)—Bit 3 - Motorola DSP56800 Manual

16-bit digital signal processor
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When the SA bit in the OMR register is set to one, the E bit is set based on
the result before passing through the MAC Output Limiter. If SA is set to
one and saturation does occur in the MAC Output Limiter, this can result
in the E bit being set, even though the result is saturated to a value where
the extension portion is not in use.
A.4.1.4
Unnormalized (U)—Bit 4
The U bit is updated under the following conditions. If the SA bit in the OMR is set to one, this bit is
cleared if saturation occurs in the MAC Output Limiter. If the SA bit is zero or no saturation occurs, U is
set if the two MSBs of the MSP of the result are the same following a data ALU operation; it is cleared
otherwise. The computation of U varies depending on the size of the operation's destination or result.
For 20-, 32-, and 36-bit destinations or results, U is computed according to the following formula (32-bit
destinations are first extended as described for the E bit):
U = ~(Bit 31 ⊕ Bit 30)
Sixteen-bit destinations are first extended as described for the E bit. Then U is computed as follows:
U = ~(Bit 15 ⊕ Bit 14)
The U bit is not affected by the OMR's CC bit.
A.4.1.5
Negative (N)—Bit 3
The N bit is updated based on the result of a data ALU operation. In general, it reflects the sign bit (MSB)
of the result, according to the following rules:
For 20- or 36-bit results:
N = bit 35 for A or B (bit 31 if the OMR's CC bit is set to one)
N = bit 15 for Y1, Y0, or X0
For 32-bit results:
N = bit 31 for A, B, or Y (the OMR's CC bit has no effect)
N = bit 15 for Y1, Y0, or X0
For 16-bit results:
N = bit 31 for A, B, or Y (the OMR's CC bit has no effect)
N = bit 15 for 16-bit destination
When the SA bit in the OMR register is set to one, the N bit is set based on the result before passing
through the MAC Output Limiter.
For the ASRAC and LSRAC instructions, the N bit is calculated differently based on the SA bit in the
OMR register. When the SA bit is zero and the destination is one of the accumulators, the N bit is obtained
from bit 35. When SA is one and the destination is one of the accumulators, the N bit is set based on bit 31
of the result before passing through the MAC output limiter.
For the IMPY instruction, a 31-bit integer product is calculated internally to the data ALU, and the lowest
16 bits of this product are stored in the destination register. When SA is one or CC is one, the N bit is set to
the value in bit 30 of this internally computed result. When SA is zero and CC is zero, the N bit is set to the
value in bit 15 of this internally computed result. These two values are identical except in the case where
overflow occurs (that is, the result is larger than and will not fit in 16 bits).
NOTE:
Instruction Set Details
A-9

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