Motorola DSP56800 Manual page 296

16-bit digital signal processor
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CMP
Operation:
D - S
(parallel move)
Description: Subtract the two operands and update the CCR. The result of the subtraction operation is not stored.
Usage:
This instruction can be used for both integer and fractional two's-complement data.
Note:
This instruction subtracts 36-bit operands. When a word is specified as the source, it is sign extended
and zero filled to form a valid 36-bit operand. In order for C to be set correctly as a result of the sub-
traction, the destination must be properly sign extended. The destination can be improperly sign ex-
tended by writing A1 or B1 explicitly prior to executing the compare, so that A2 or B2, respectively,
may not represent the correct sign extension. This note particularly applies to the case in which the
source is extended to compare 16-bit operands, such as X0 with A1.
Example:
CMP
Before Execution
0
0020
A2
A1
Y0
0024
SR
0300
Explanation of Example:
Prior to execution, the 36-bit A accumulator contains the value $0:0020:0000, and the 16-bit Y0 reg-
ister contains the value $0024. Execution of the CMP Y0,A instruction automatically appends the
16-bit value in the Y0 register with 16 LS zeros, sign extends the resulting 32-bit long word to 36 bits,
subtracts the result from the 36-bit A accumulator, and updates the CCR (leaving the A accumulator
unchanged).
A-66
Compare
Assembler Syntax:
CMP
Y0,A
X0,X:(R1)+N
0000
A0
DSP56800 Family Manual
S,D
(parallel move)
; compare Y0 and A, save X0,
; update R1
After Execution
0
0020
A2
A1
Y0
0024
SR
0319
CMP
0000
A0

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