Motorola DSP56800 Manual page 432

HWS
hardware stack
I1, I0
interrupt mask bits
IC
integrated circuit
JTAG
Joint Test Access Group
I/O
input/output
IPL
interrupt priority level
IPR
interrupt priority register
K&R
Kernighan and Ritchie
L
limit bit
LA
loop address register
LC
loop counter register
LE
less than or equal to
LF
loop flag bit
LIFO
last-in-first-out
G-4 DSP56800 Family Manual