Motorola NXP SYMPHONY DSP56007 Technical Data Manual

Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
SYMPHONY ™ AUDIO DSP FAMILY
24-BIT DIGITAL SIGNAL PROCESSORS
Motorola designed the Symphony ™ family of high-performance, programmable Digital Signal
Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic,
ATRAC, and Lucasfilm Home THX processing. Software for these applications is licensed by
Motorola for integration into products like audio/video receivers, televisions, and automotive
sound systems with such user-developed features as digital equalization and sound field
processing. The DSP56007 is an MPU-style general purpose DSP, composed of an efficient 24-bit
Digital Signal Processor core, program and data memories, various peripherals optimized for
audio, and support circuitry. As illustrated in Figure 1 , the DSP56000 core family compatible
DSP is fed by program memory, two independent data RAMs and two data ROMs, a Serial
Audio Interface (SAI), Serial Host Interface (SHI), External Memory Interface (EMI), dedicated
I/O lines, on-chip Phase Lock Loop (PLL), and On-Chip Emulation (OnCE ™ ) port. The
DSP56007 has significantly more on-chip memory than the DSP56004.
4
General
Purpose
Input/
Output
24-Bit
DSP56000
Core
Internal
Data
Bus
Switch
TM
OnCE Port
Interrupt
Control
Clock
PLL
Gen.
3 4
IRQA, IRQB, NMI, RESET
©1996, 1997 MOTOROLA, INC.
9 5
Serial Serial External
Audio Host Memory
Interface Interface Interface
(SAI) (SHI)
(EMI)
Address
Generation
Unit
GDB
PDB
XDB
YDB
Program Program
Address
Decode
Controller Generator
Program Control Unit
4
Figure 1 DSP56007 Block Diagram
For More Information On This Product,
Go to: www.freescale.com
ˇ
29
X Data
Program
Memory* Memory*
PAB
XAB
YAB
Data ALU
24 × 24 + 56 → 56-Bit MAC
Two 56-Bit Accumulators
Refer to Table 1 for memory configurations.
*
Order this document by:
DSP56007/D
DSP56007
16-Bit Bus
24-Bit Bus
Y Data
Memory*
AA0248