Motorola DSP56800 Manual page 154

16-bit digital signal processor
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Instruction Set Introduction
Table 6-24. Data ALU Arithmetic Instructions (Continued)
Operation
CMP
DEC(W)
DIV
INC(W)
NEG
RND
SBC
SUB
TFR
TST
6-22
Operands
C
DD,FDD
2
F1,DD
~F,F
X:(SP-xx),FDD
6
X:aa,FDD
4
X:xxxx,FDD
6
#xx,FDD
4
#xxxx,FDD
6
FDD
2
X:(SP-xx)
8
X:aa
6
X:xxxx
8
DD,F
2
FDD
2
X:(SP-xx)
8
X:aa
6
X:xxxx
8
F
2
F
2
Y,F
2
DD,FDD
2
F1,DD
~F,F
Y,F
X:(SP-xx),FDD
6
X:aa,FDD
4
X:xxxx,FDD
6
#xx,FDD
4
#xxxx,FDD
6
DD,F
2
A,B
2
B,A
2
F
2
DSP56800 Family Manual
W
Comments
1
36-bit compare of two accumulators or data registers.
1
Compare memory word with 36-bit accumulator.
1
X:aa represents a 6-bit absolute address. Refer to
2
Absolute Short Address (Direct Addressing): <aa>
on page 4-22
Note: Condition codes set based on 36-bit result
1
Compare accumulator with an immediate integer 0–31.
2
Compare accumulator with a signed 16-bit immediate.
1
Decrement word.
1
Decrement word in memory using appropriate
addressing mode.
1
2
1
Divide iteration.
1
Increment word.
1
Increment word in memory using appropriate address-
ing mode.
1
2
1
Two's-complement negation.
1
Round.
1
Subtract with carry (set C bit also).
1
36-bit subtract of two registers. 16-bit source registers
are first sign extended internally and concatenated
with 16 zero bits to form a 36-bit operand.
1
Subtract memory word from register.
X:aa represents a 6-bit absolute address. Refer to
1
Absolute Short Address (Direct Addressing): <aa>
2
on page 4-22
1
Subtract an immediate value 0–31.
2
Subtract a signed 16-bit immediate.
1
Transfer register to register.
1
Transfer one accumulator to another (36-bits).
1
Transfer one accumulator to another (36-bits).
1
Test 36-bit accumulator.

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