Clr - Motorola DSP56800 Manual

CLR

Operation:
0 → D
(parallel move)
Description: Clear the destination register.
Implementation Note:
When a 16-bit register is used as the operand for CLR, this instruction is actually assembled as a
MOVE #0,<register> instruction. It will disassemble as MOVE.
Example:
CLR
A Before Execution
2 3456
A2 A1
Explanation of Example:
Prior to execution, the 36-bit A accumulator contains the value $2:3456:789A. Execution of the
CLR A instruction clears the 36-bit A accumulator to zero.
Condition Codes Affected:
15 14
LF *
Note:
The condition codes are only affected if the destination of the CLR instruction is one of the two 36-bit
accumulators (A or B).
A-64
Clear Accumulator
A A,X:(R0)+
789A
A0
MR
13 12 11 10 9
* * * * I1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L — Set if data limiting has occurred during parallel move
E — Always cleared if destination is a 36-bit accumulator
U — Always set if destination is a 36-bit accumulator
N — Always cleared if destination is a 36-bit accumulator
Z — Always set if destination is a 36-bit accumulator
V — Always cleared if destination is a 36-bit accumulator
DSP56800 Family Manual
Assembler Syntax:
CLR D
; save A into X data memory before
; clearing it
A After Execution
0 0000
A2 A1
CCR
8 7 6 5 4
SZ L E U
I0
CLR
(parallel move)
0000
A0
3 2 1 0
N Z V
C