Jumps And Branches; Jrset And Jrclr Operations - Motorola DSP56800 Manual

Software Techniques
Table 8-1. Operations Synthesized Using DSP56800 Instructions (Continued)
Operation
JVS, JVC, BVS, BVC
JPL, JMI, JES, JEC, JLMS, JLMC,
BPL, BMI, BES, BEC, BLMS, BLMC
NEGW
NEG
XCHG
MAX
MIN
Accumulator sign extend
Accumulator unsigned load
8.1.1

Jumps and Branches

Several operations for jumping and branching can be emulated, depending on selected bits in a bit field,
overflows, or other condition codes.
8.1.1.1

JRSET and JRCLR Operations

The JRSET and JRCLR operations are very similar to the BRSET and BRCLR instructions. They still test
a bit field and go to another address if all masked bits are either set or cleared. The BRSET and BRCLR
instructions only allow branches of 64 locations away from the current instruction and can only test an
8-bit field; however, JRSET and JRCLR operations allow jumps to anywhere in the 64K-word program
address space, and can specify a 16-bit mask. The following code shows that these two operations allow
the same addressing modes as the BFTSTH and BFTSTL instructions.
; JRSET Operation
; Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words
BFTSTH
JCS
; JRCLR Operation
; Emulated in 5 Icyc (4 Icyc if false), 4 Instruction Words
BFTSTL
JCS
8-2
Jumps or branches if the overflow bit is set or clear
Jumps or branches on other condition codes
Negates of upper two registers of an accumulator
Negates another data ALU register, an AGU register, or a memory location
Exchanges any two registers
Returns the maximum of two registers
Returns the minimum of two registers
Sign extends the accumulator into the A2 or B2 portion
Zeros the accumulator LSP and extension register
Example 8-1. JRSET and JRCLR
#xxxx,X:<ea>
label
#xxxx,X:<ea>
label
DSP56800 Family Manual
Description
; 16-bit mask allowed
; 16-bit jump address allowed
; 16-bit mask allowed
; 16-bit jump address allowed