Bfclr - T - Motorola DSP56800 Manual

16-bit digital signal processor
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BFCLR
Operation:
0 → (<bit field> of destination)
0 → (<bit field> of destination)
Description: Test all selected bits of the destination operand. If all selected bits are set, C is set; otherwise, C is
cleared. Then clear the selected bits and store the result in the destination memory location. The bits
to be tested are selected by a 16-bit immediate value in which every bit set is to be tested and cleared.
This instruction performs a read-modify-write operation on the destination memory location or register
and requires two destination accesses.
Usage:
This instruction is very useful in performing I/O and flag bit manipulation.
Example:
BFCLR
Before Execution
X:$FFE2
SR
Explanation of Example:
Prior to execution, the 16-bit X memory location X:$FFE2 contains the value $7F95. Execution of the
instruction tests the state of the bits 4, 8, and 9 in X:$FFE2; clears C (because not all the CCR bits were
clear); and then clears the bits.
Condition Codes Affected:
15
14
LF
*
For destination operand SR:
For other destination operands:
Note:
If all bits in the mask are set to zero, the destination is unchanged, and the C bit is set.
A-52
Test Bit Field and Clear
#$0310,X:<<$FFE2
7F95
0001
MR
13
12
11
10
9
*
*
*
*
I1
?
— Cleared as defined in the field and if specified in the field
L
— Set if data limiting occurred during 36-bit source move
C
— Set if all bits specified by the mask are set
Clear if not all bits specified by the mask are set
DSP56800 Family Manual
Assembler Syntax:
BFCLR
BFCLR
; test and clear bits 4, 8, and 9 in
; an on-chip peripheral register
After Execution
X:$FFE2
SR
CCR
8
7
6
5
4
L
I0
SZ
E
U
BFCLR
#iiii,X:<ea>
#iiii,D
7C85
0000
3
2
1
0
C
N
Z
V

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