Motorola DSP56800 Manual page 338

MACSU
Multiply-Accumulate Signed × Unsigned
Operation:
D + S1 * S2 → D
(S1 signed, S2 unsigned)
Description: Multiply the two 16-bit source operands (S1 and S2) and add the product to the specified 36-bit desti-
nation accumulator (D). S1 can be unsigned, but S2 is always considered unsigned. This mixed arith-
metic multiply-accumulate does not allow a parallel move and can be used for multi-precision multi-
plications.
Usage: In addition to single-precision multiplication of a signed-times-unsigned value and accumulation, this
instruction is also used for multi-precision multiplications, as shown in Section 3.3.8.2, "Multi-Preci-
sion Multiplication," on page 3-23.
Example:
MACSU
Before Execution
0 0000
A2 A1
Explanation of Example:
The 16-bit X0 register contains the value $3456 and the 16-bit Y0 register contains the value $8000.
Execution of the MACSU X0,Y0,A instruction multiplies the 16-bit signed value in the X0 register
by the 16-bit unsigned value in Y0, and then adds the result to the A accumulator and stores the signed
result back into the A accumulator. If this were a MAC instruction, Y0 ($8000) would equal -1.0, and
the multiplication result would be $F:CBAA:0000. Since this is a MACSU instruction, Y0 is consid-
ered unsigned and equals +1.0. This gives a multiplication result of $0:3456:0000.
A-108
Assembler Syntax:
MACSU
X0,Y0,A
0099
A0
X0
3456
Y0
8000
DSP56800 Family Manual
S1,S2,D
After Execution
0 3456
A2 A1
X0
Y0
MACSU
(no parallel move)
0099
A0
3456
8000