Figure 3-1 Data Alu Block Diagram - Motorola DSP56800 Manual

XDB2
CGDB
A2 A1
B2 B1
Y1
Y0
X0
Optional
Invert
Arith/Logical
x
Shifter
SHIFTER/MUX
Rounding
Constant
OMR's SA Bit MAC Output Limiter
Condition Code
Generation
OMR's CC Bit
Condition Codes
to Status Register
Figure 3-1. Data ALU Block Diagram
Data Arithmetic Logic Unit
Overview and Architecture
A0
B0
36-bit Accumulator Shifter
+
EXT:MSP:LSP
3-3