Motorola DSP56800 Manual page 367

16-bit digital signal processor
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NORM
Operation:
If
(E • U • Z = 1)
ASL D and Rn - 1 → Rn
then
else if
(E = 1)
ASR D and Rn + 1 → Rn
then
else
NOP
where X denotes the logical complement of X and
where • denotes the logical AND operator
Description: Perform one normalization iteration on the specified destination operand (D), update the address reg-
ister R0 based upon the results of that iteration, and store the result back in the destination accumulator.
This is a 36-bit operation. If the accumulator extension is not in use, the accumulator is unnormalized,
and the accumulator is not zero, then the destination operand is arithmetically shifted 1 bit to the left,
and the specified address register is decremented by one. If the accumulator extension register is in use,
the destination operand is arithmetically shifted 1 bit to the right, and the specified address register is
incremented by one. If the accumulator is normalized or zero, a NOP is executed, and the specified
address register is not affected. Since the operation of the NORM instruction depends on the E, U, and
Z CCR bits, these bits must correctly reflect the current state of the destination accumulator prior to
executing the NORM instruction. The L and V bits in the CCR will be cleared unless they have been
improperly set up prior to executing the NORM instruction.
Example:
TST
REP
NORM
Before Execution
0
0000
A2
A1
R0
0000
Explanation of Example:
Prior to execution, the 36-bit A accumulator contains the value $0:0000:8000, and the 16-bit R0 ad-
dress register contains the value $0000. The repetition of the NORM R0,A instruction normalizes the
value in the 36-bit accumulator and stores the resulting number of shifts performed during that normal-
ization process in the R0 address register. A negative value reflects the number of left shifts performed,
while a positive value reflects the number of right shifts performed during the normalization process.
In this example, 15 left shifts are required for normalization.
Normalize Accumulator Iteration
Assembler Syntax:
NORM
A
#31
; maximum number of iterations (31) needed
R0,A
; perform one normalization iteration
8000
A0
Instruction Set Details
R0,D
After Execution
0
4000
A2
A1
R0
FFF1
NORM
(no parallel move)
0000
A0
A-137

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