Brclr - T - Motorola DSP56800 Manual

BRCLR
Operation:
Branch if <bit field> of destination is all zeros
Branch if <bit field> of destination is all zeros
Description: Test all selected bits of the destination operand. If all the selected bits are clear, C is set, and program
execution continues at the location in program memory at PC + displacement. Otherwise, C is cleared
and execution continues with the next sequential instruction. The bits to be tested are selected by an
8-bit immediate value in which every bit set is to be tested.
Usage:
This instruction is useful in performing I/O flag polling.
Example:
LABEL
Before Execution
X:$FFE2
SR
Explanation of Example:
Prior to execution, the 16-bit X memory location X:$FFE2 contains the value $18EC. Execution of the
instruction tests the state of bits 4, 1, and 0 in X:$FFE2 and sets C (because all the CCR bits were clear).
Since C is set, program execution is transferred to the address offset from the current program counter
by the displacement specified in the instruction, (the two INCW instructions are not executed).
Condition Codes Affected:
15 14
LF *
Note: If all bits in the mask are set to zero, C is set, and the branch is taken.
A-60
Branch if Bits Clear
BRCLR #$0013,X:<<$FFE2,LABEL
INCW A
INCW A
ADD B,A
18EC
0000
MR
13 12 11 10 9
* * * * I1
L — Set if data limiting occurred during 36-bit source move
C — Set if all bits specified by the mask are cleared
Clear if not all bits specified by the mask are cleared
DSP56800 Family Manual
Assembler Syntax:
BRCLR
BRCLR
After Execution
X:$FFE2
SR
CCR
8 7 6 5 4
L
I0 SZ E U
BRCLR
#iiii,X:<ea>,aa
#iiii,D,aa
18EC
0001
3 2 1 0
C
N Z V