Modifier Register (M01); Modulo Arithmetic Unit; Incrementer/Decrementer Unit - Motorola DSP56800 Manual

If the N address register is changed with a MOVE instruction, this
register's contents will be available for use on the immediately following
instruction. In this case the instruction that writes the N address register
will be stretched one additional instruction cycle. This is true for the case
when the N register is used by the immediately following instruction; if N
is not used, then the instruction is not stretched an additional cycle. If the
N address register is changed with a bit-field instruction, the new contents
will not be available for use until the second following instruction.
4.1.4

Modifier Register (M01)

The modifier register (M01) specifies whether linear or modulo arithmetic is used when calculating a new
address and may be read or written by the CGDB. This modifier register is automatically read when the R0
address register is used in an address calculation and can optionally be used also when R1 is used. This
register has no effect on address calculations done with the R2, R3, or SP registers. It is used as input to the
modulo arithmetic unit. This modifier register is preset during a processor reset to $FFFF (linear
arithmetic).
Due to pipelining, if an address register (Rn, SP, or M01) is changed with
a MOVE or bit-field instruction, the new contents will not be available for
use as a pointer until the second following instruction. If the SP is changed,
no LEA or POP instructions are permitted until the following instruction.
4.1.5

Modulo Arithmetic Unit

The modulo arithmetic unit can update one address register or the SP during one instruction cycle. It is
capable of performing linear and modulo arithmetic, as described in Section 4.3, "AGU Address
Arithmetic." The contents of the modifier register specifies the type of arithmetic to be performed in an
address register update calculation. The modifier value is decoded in the modulo arithmetic unit and
affects the unit's operation. The modulo arithmetic unit's operation is data-dependent and requires
execution cycle decoding of the selected modifier register contents. Note that the modulo capability is only
allowed for R0 or R1 updates; it is not allowed for R2, R3, or SP updates.
The modulo arithmetic unit first calculates the result of linear arithmetic (for example, Rn+1, Rn-1, Rn+N)
which is selected as the modulo arithmetic unit's output for linear arithmetic. For modulo arithmetic, the
modulo arithmetic unit will perform the function (Rn+N) modulo (M01+1), where N can be 1, -1, or the
contents of the offset register N. If the modulo operation requires "wraparound" for modulo arithmetic, the
summed output of the modulo adder will give the correct, updated address register value; otherwise, if
wraparound is not necessary, the linear arithmetic calculation gives the correct result.
4.1.6

Incrementer/Decrementer Unit

The incrementer/decrementer unit is used for address-update calculations during dual data-memory read
instructions. It is used either to increment or decrement the R3 register. This adder performs only linear
arithmetic; it performs no modulo arithmetic.
NOTE:
NOTE:
Address Generation Unit
Architecture and Programming Model
4-5