Motorola DSP56800 Manual page 384

16-bit digital signal processor
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ROR
Operation:
(see following figure)
:
C
Description: Logically shift 16 bits of the destination operand (D) 1 bit to the right and store the result in the desti-
nation. If the destination is a 36-bit accumulator, the result is stored in the MSP of the accumulator (A1
or B1), and the remaining portions of the accumulator (A2, B2, A0, and B0) are not modified. The LSB
of the destination (bit 16 if the destination is a 36-bit accumulator) prior to the execution of the instruc-
tion is shifted into C, and the previous value of C is shifted into the MSB of the destination (bit 31 if
the destination is a 36-bit accumulator).
Example:
ROR
Before Execution
F
0001
B2
B1
SR
0000
Explanation of Example:
Prior to execution, the 36-bit B accumulator contains the value $F:0001:00AA. Execution of the
ROR B instruction shifts the 16-bit value in the B1 register 1 bit to the right, shifting bit 16 into C,
rotating C into bit 31, and storing the result back in the B1 register.
A-154
Rotate Right
Unch.
D2
D1
B
00AA
B0
DSP56800 Family Manual
Assembler Syntax:
ROR
Unchanged
D0
; rotate B1 right 1 bit
After Execution
F
0000
B2
B1
SR
0005
ROR
D
(parallel move)
00AA
B0

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