Motorola DSP56800 Manual page 377

16-bit digital signal processor
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REP
Operation:
LC → TEMP; #xx → LC
Repeat next instruction until LC = 1
TEMP → LC
LC → TEMP; S → LC
Repeat next instruction until LC = 1
TEMP → LC
Description: Repeat the single word instruction immediately following the REP instruction the specified number of
times. The value specifying the number of times the given instruction is to be repeated is loaded into
the 13-bit LC register. The contents of the 13-bit LC register are treated as unsigned (that is, always
positive). The single word instruction is then executed the specified number of times, decrementing
the LC after each execution until LC equals one. When the REP instruction is in effect, the repeated
instruction is fetched only one time, and it remains in the instruction register for the duration of the
loop count. Thus, the REP instruction is not interruptible. The contents of the LC register upon entering
the REP instruction are stored in an internal temporary register and are restored into the LC register
upon exiting the REP loop. If LC is set equal to zero, the instruction is not repeated and execution con-
tinues with the instruction immediately following the instruction that was to be repeated. The instruc-
tion's effective address specifies the address of the value that is to be loaded into the LC.
The REP instruction allows all registers on the DSP core to specify the number of loop iterations except
for the following: M01, HWS, OMR, and SR. If immediate short data is instead used to specify the
loop count, the 6 LSBs of the LC register are loaded from the instruction and the upper 7 MSBs are
cleared.
Note:
If the A or B accumulator is specified as a source operand, and the data out of the accumulator indicates
that extension is in use, the value to be loaded into the LC register will be limited to a 16-bit maximum
positive or negative saturation constant. If positive saturation occurs, the limiter places $7FFF onto the
bus, and the lower 13 bits of this value are all ones. The 13 ones are loaded into the LC register as the
maximum unsigned positive loop count allowed. If negative saturation occurs, the limiter places $8000
onto the bus, and the lower 13 bits of this value are all zeros. The 13 zeros are loaded into the LC reg-
ister, specifying a loop count of zero. The A and B accumulators remain unchanged.
Note:
Once in progress, the REP instruction and the REP loop may not be interrupted until completion of the
REP loop.
Restrictions:
The REP instruction can repeat any single word instruction except the REP instruction itself and any
instruction that changes program flow. The following instructions are not allowed to follow a REP in-
struction:
Also, a REP instruction cannot be the last instruction in a DO loop (at the LA). The assembler will
generate an error if any of the preceding instructions are found immediately following a REP instruc-
tion.
Repeat Next Instruction
Any instruction that occupies multiple words
DO
Bcc, Jcc
BRCLR, BRSET BRA, JMP
MOVEM
JSR
REP
RTI
RTS
STOP, WAIT
SWI, DEBUG
Tcc
Instruction Set Details
Assembler Syntax:
REP
#xx
REP
S
REP
A-147

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